A typical embedded application architecture usually comprises one master chip and more than one memory. The address bus and data bus of a parallel memory are designed separately, with tens of pins in total. Such a design has a relatively high data transmission rate. However, convenience and usability of application of the parallel memory are restricted due to the large number of pins and relatively high cost of interconnection, thus limiting its wide application in embedded systems such as an SOC single chip system.
With the evolution of techniques of memory that employs a serial SPI interface, the transmission rate of a mainstream serial memory has reached the order of 80 Mbps. Such a transmission rate is sufficient for low level data transmission applications. However, it is not sufficient if a program is to be directly run or data is to be transmitted with high speed on the serial memory. There have been some types of multi-channel SPI interface memories commercially available, such as the 4-channel SPI FLASH memory by Winbond Corporation, which is compatible with the previous single-channel SPI interface, uses the same 6-signal pins as the previous design, but supports 4 times of the previous transmission rate, i.e. up to 320 Mbps. A multi-channel serial memory has a higher transmission rate, which may meet the requirements for running programs and algorithms directly on the memory. The number of signal pins of such a serial SPI interface memory is six. Such low cost on pins makes the serial memory extremely convenient in application in an embedded system, reducing the design cost on the board level, and facilitating the wide use of such a serial memory in the field of embedded system and SOC single chip system.
However, an existing SPI interface memory is not capable of supporting directly program running thereon. When it is required for an embedded system or SOC single chip system to run a program kept on a serial memory, such a program in the memory, before it can be executed, has to be copied to a memory space such as SDRAM or SRAM which can run a program directly. Such an approach not only occupies valuable memory resources inside the embedded system or chip, but also limits the functionality of memory to saving data. It is highly desirable in the art for serial memory interface to run a program directly.